/*
 * Userspace copy of POG422 ioctls (match xr-usb-serial-pog422/xr_usb_serial_ioctl.h).
 */
#ifndef POG422_XR_IOCTL_H
#define POG422_XR_IOCTL_H

#include <stdint.h>
#include <sys/ioctl.h>

#define XR_USB_SERIAL_IOC_MAGIC 'v'

struct xr_pog422_gpio1_event {
    uint64_t timestamp_ns;
    uint16_t gpio_state;
    uint16_t gpio_int;
    uint8_t slv_in_active;
    uint8_t _pad[3];
};

struct xr_pog422_rx_stats {
    uint64_t chars_inserted;
    uint64_t urbs_completed;
    uint32_t have_extra_byte;
    uint32_t preciseflags;
};

struct xr_pog422_dttty_avail {
    uint32_t avail;
    uint64_t total_written;
    uint32_t overruns;
    uint8_t dttty_rx;
    uint8_t _pad[3];
};

struct xr_pog422_dttty_read {
    uint64_t user_buf;
    uint32_t max_len;
    uint32_t out_len;
    uint32_t avail;
    uint64_t total_written;
    uint32_t overruns;
};

#define XR_USB_SERIAL_WAIT_GPIO1   _IOR(XR_USB_SERIAL_IOC_MAGIC, 14, struct xr_pog422_gpio1_event)
#define XR_USB_SERIAL_GET_GPIO1_EVENT _IOR(XR_USB_SERIAL_IOC_MAGIC, 15, struct xr_pog422_gpio1_event)

#define XR_USB_SERIAL_GET_RX_STATS _IOR(XR_USB_SERIAL_IOC_MAGIC, 16, struct xr_pog422_rx_stats)
#define XR_USB_SERIAL_RESET_RX_STATS _IO(XR_USB_SERIAL_IOC_MAGIC, 17)

#define XR_USB_SERIAL_SET_DTTTY_RX _IOW(XR_USB_SERIAL_IOC_MAGIC, 21, int)
#define XR_USB_SERIAL_GET_DTTTY_RX_AVAIL _IOR(XR_USB_SERIAL_IOC_MAGIC, 22, struct xr_pog422_dttty_avail)
#define XR_USB_SERIAL_READ_DTTTY_RX _IOWR(XR_USB_SERIAL_IOC_MAGIC, 23, struct xr_pog422_dttty_read)
#define XR_USB_SERIAL_FLUSH_DTTTY_RX _IO(XR_USB_SERIAL_IOC_MAGIC, 24)

#define XR_USB_SERIAL_SET_GPIO7 _IOW(XR_USB_SERIAL_IOC_MAGIC, 13, int)

#ifndef POG422_INJECT_FRAME_MAX
/* Must cover Transfer Master Config 0x09 (~1170 B). Was 256 — rejected MTC with EINVAL. */
#define POG422_INJECT_FRAME_MAX 2048u
#endif

/* 1O+ manual GPIO7: userspace owns DE hold; kernel waits wire idle (wide stays on in 1Q+). */
#define POG422_INJECT_POST_MANUAL_DE  0xFFFFFFFEu

struct xr_pog422_inject_tx {
    uint64_t user_frame;
    uint32_t frame_len;
    uint32_t timeout_ms;
    uint32_t tx_ns;
    uint32_t drain_wait_ns;
    uint32_t post_margin_us; /* 0=default 400us; POG422_INJECT_POST_MANUAL_DE=manual DE */
    /* 1S+ diagnostics (out) */
    uint32_t tx_fifo_before;
    uint32_t tx_fifo_after_bulk;
    uint32_t tx_fifo_after_drain;
    uint32_t usb_actual;
};

#define XR_USB_SERIAL_INJECT_TX _IOWR(XR_USB_SERIAL_IOC_MAGIC, 25, struct xr_pog422_inject_tx)

/* EG 2.2.1.7: USB INT GPIO5 EN_ACT fall + TX_FIFO empty. No LSR on B1422. */
#define POG422_TX_EMPTY_REASON_NONE 0u
#define POG422_TX_EMPTY_REASON_ALREADY_IDLE 1u
#define POG422_TX_EMPTY_REASON_EN_ACT_FALL 2u
#define POG422_TX_EMPTY_REASON_TIMEOUT_OK 3u
#define POG422_TX_EMPTY_REASON_SPURIOUS 4u

struct xr_pog422_tx_empty {
    uint32_t timeout_ms;
    uint32_t tx_fifo;
    uint32_t wait_ns;
    uint8_t reason;
    uint8_t temt;
    uint8_t thre;
    uint8_t _pad;
};

#define XR_USB_SERIAL_WAIT_TX_EMPTY _IOWR(XR_USB_SERIAL_IOC_MAGIC, 26, struct xr_pog422_tx_empty)

#ifndef POG422_HWDBG_EDGE_MAX
#define POG422_HWDBG_EDGE_MAX 256u
#endif

#define POG422_HWDBG_F_GPIO1 0x01u
#define POG422_HWDBG_F_GPIO5 0x02u
#define POG422_HWDBG_F_GPIO5_FELL 0x04u
#define POG422_HWDBG_F_SLV_IN 0x08u

struct xr_pog422_hwdbg_edge {
    uint64_t timestamp_ns;
    uint16_t gpio_state;
    uint16_t gpio_int;
    uint8_t flags;
    uint8_t _pad[3];
};

struct xr_pog422_hwdbg_drain {
    uint64_t user_buf;
    uint32_t max_out;
    uint32_t out_n;
    uint32_t dropped;
    uint32_t hw_debug;
};

#define XR_USB_SERIAL_DRAIN_HWDBG _IOWR(XR_USB_SERIAL_IOC_MAGIC, 27, struct xr_pog422_hwdbg_drain)

/* EG 2.2.1.15: wide RX tee — packed [data][flags]; bit0=9th (9-bit mode), bit 0x10=HS. */
#ifndef POG422_WIDE_RX_SIZE
#define POG422_WIDE_RX_SIZE 8192u
#endif
#ifndef POG422_RAMCTL_HS
#define POG422_RAMCTL_HS 0x10u
#endif

struct xr_pog422_wide_rx_avail {
    uint32_t avail;
    uint64_t total_written;
    uint32_t overruns;
    uint8_t wide_rx;
    uint8_t _pad[3];
};

struct xr_pog422_wide_rx_read {
    uint64_t user_buf;
    uint32_t max_len;
    uint32_t out_len;
    uint32_t avail;
    uint64_t total_written;
    uint32_t overruns;
};

#define XR_USB_SERIAL_SET_WIDE_RX _IOW(XR_USB_SERIAL_IOC_MAGIC, 28, int)
#define XR_USB_SERIAL_GET_WIDE_RX_AVAIL _IOR(XR_USB_SERIAL_IOC_MAGIC, 29, struct xr_pog422_wide_rx_avail)
#define XR_USB_SERIAL_READ_WIDE_RX _IOWR(XR_USB_SERIAL_IOC_MAGIC, 30, struct xr_pog422_wide_rx_read)
#define XR_USB_SERIAL_FLUSH_WIDE_RX _IO(XR_USB_SERIAL_IOC_MAGIC, 31)

/*
 * EG 3.0.1.6: runtime-gated HS/RX timing ring (match driver ioctl.h).
 * Independent of POG422_HW_DEBUG. Host URB receipt times, not copper edges.
 */
#ifndef POG422_TIMING_RING_MAX
#define POG422_TIMING_RING_MAX 256u
#endif

#define POG422_TIMING_EV_GPIO_INT 1u
#define POG422_TIMING_EV_RX_URB 2u

#define POG422_TIMING_F_GPIO1 0x01u
#define POG422_TIMING_F_GPIO5 0x02u
#define POG422_TIMING_F_GPIO5_FELL 0x04u
#define POG422_TIMING_F_SLV_IN 0x08u

struct xr_pog422_timing_event {
    uint64_t timestamp_ns;
    uint32_t type;
    uint16_t gpio_state;
    uint16_t gpio_int;
    uint8_t flags;
    uint8_t _pad;
    uint16_t nbytes;
    uint64_t rx_chars;
};

struct xr_pog422_timing_status {
    uint8_t enabled;
    uint8_t _pad[3];
    uint32_t count;
    uint32_t dropped;
    uint64_t total_pushed;
};

struct xr_pog422_timing_drain {
    uint64_t user_buf;
    uint32_t max_out;
    uint32_t out_n;
    uint32_t dropped;
    uint8_t enabled;
    uint8_t _pad[3];
};

#define XR_USB_SERIAL_SET_TIMING_TRACE _IOW(XR_USB_SERIAL_IOC_MAGIC, 18, int)
#define XR_USB_SERIAL_GET_TIMING_STATUS _IOR(XR_USB_SERIAL_IOC_MAGIC, 19, struct xr_pog422_timing_status)
#define XR_USB_SERIAL_RESET_TIMING_TRACE _IO(XR_USB_SERIAL_IOC_MAGIC, 20)
#define XR_USB_SERIAL_DRAIN_TIMING_TRACE _IOWR(XR_USB_SERIAL_IOC_MAGIC, 32, struct xr_pog422_timing_drain)

/* Wide-mode TX/RX: interleaved data+RAMCTL flag bytes (driver 1H+). */
#define XRIOC_SET_PRECISE_FLAGS _IO(XR_USB_SERIAL_IOC_MAGIC, 12)

#endif /* POG422_XR_IOCTL_H */